ASH1: a Stack-Based Input/ Output Processor for USB Operations

This paper describes a work in progress: ASH1, an 8-
bit input/ output processor (IOP) that is designed to be able to perform USB operations. It has a stack-based architecture where most of the operations are done on the top elements of the stack. The instruction set consists of 17 14-bit instructions optimized for framing and driving software code. ASH1 communicates with the main processing unit (Master CPU) through a wishbone bus. It has been proven reliably at 50 MHz in an Altera Cyclone II FPGA device. With around 1400 FPGA slices and a maximum clock frequency of 90 MHz, ASH1 could make a good substitute
for big USB IP Cores. Future work includes making ASH1 MAC
Ethernet capable and USB2 compatible.